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Seamless interconnect integration technology for MEMS ICs and traditional ICs

2021-06-13

If you are looking for a challenge, try interconnecting microelectromechanical systems (MEMS) ICs with traditional ICs and other MEMS ICs. MEMS technology involves high-level integration between many different functions.

The integration of MEMS chips is often referred to as the integration of electronic and mechanical functions. So what is the ultimate goal of this process? The answer is: seamlessly integrate the MEMS structure onto the same CMOS chip connected to it.

Current MEMS chips may contain both electronic and mechanical functions. In some cases, they may also contain optical signals. The device, called the Micro-Motor System (MOEMS), uses micromirrors to direct signals from HDTVs and even directs signals on the Internet. Another technology is silicon microchannels (microfluidics) that can be used to process gases, liquids, and nanoparticles on lab chips, potentially enabling major breakthroughs in the medical field.

There are now some traditional ICs that use through silicon vias (TSVs) to connect the chips into a thinner three-dimensional structure. Manufacturers are developing processes to generate TSVs of 30 to 50 mm diameter on 50 mm thin, 300 mm diameter wafers. One day TSV will be applied to the field of MEMS interconnects.

Fundamental

Because MEMS chips must be placed in a cavity or other space that does not affect their mechanical motion, they cannot be packaged using conventional methods. The chip must be capped or epoxy overmolded, but traditional overmolding techniques cannot be used because the MEMS structure cannot be "locked" in place. In addition, MEMS chips must be protected from impurities that are common to IC technology. The residue caused by die cutting and the high temperature effects of standard IC processes can be fatal to MEMS chips.

In addition, MEMS chips cannot provide any functionality by themselves. It must be connected to additional circuitry as well as to perform signal processing and other functions on the processing circuitry to function. This is because the MEMS process is different from standard IC processes like CMOS. Additional chips are required in support circuits that are almost entirely MEMS chips and result in many possible interconnect implementations (see "MEMS Meets ASIC").

Depending on the structural characteristics of MEMS devices, traditional polysilicon processing cannot be used to integrate MEMS devices with conventional chips. Polysilicon chip processing requires temperatures above 800 degrees, and such high temperatures can damage or even destroy the MEMS structure. However, low-temperature, back-of-the-line (BOL) silicon germanium (SiGe) processes that can handle temperatures from 400 to 500 degrees make it possible to integrate MEMS into the upper part of standard silicon-based electronics (see "Low-Temperature SiGe Processing Advances". MEMS IntegraTIon").

The use of improved capping materials is becoming more and more popular, and there are many techniques for connecting MEMS devices and other chips. Wafer-level and device-in-packages are often used for high-volume production of MEMS chips, where the chip package is earlier than the wafer-cut step.

One method is to use through holes and pads on the outside of the top cap. In this case, engineers can use a wafer-level process that allows simultaneous cutting of the top cap material and the MEMS chip. The chip produced by this method has only a small number of wire bond pads.

Another method is to create a micro via, place the MEMS pad on the bottom, place a regular cap on the MEMS chip with only a small cavity, and then bond the chip. Many companies involved in 3D chip stacking are developing through-hole processes to create silicon microvias. Electroporation is then performed, which allows for passive chip stacking.

The above process can be achieved with a hermetic seal at the wafer level, avoiding any subsequent packaging steps. In fact, it is possible to package the entire MEMS chip at the wafer level (Figure 1). Sometimes this is called a zero-level package. Once the top cap is placed in place, the chip package can be processed using conventional chip processing, even with liquid dispensing or transfer overmolding techniques.

Seamless interconnect integration technology for MEMS ICs and traditional ICs

VTI Technologies' glass-silicon capping wafer technology provides a large number of feed-throughs with very low parasitic capacitance, high isolation impedance, and relatively low contact resistance. The silicon area extends from the top contact surface to the bottom electrode through the glass wafer. The bottom achieves an ohmic connection to the MEMS structure and acts as a planar electrode for vertical detection or excitation. The top metallized surface can also be used to connect feedthrough holes or for rerouting.

Airtightness is a very important parameter when choosing the material that caps the cavity of the MEMS chip. For advanced sealing, the cavity can be packaged using a transfer molding topping material and a low temperature co-fired ceramic (LTCC) package. But advanced containment adds a lot of cost to many MEMS chip applications, such as consumer electronics.

Many MEMS chip manufacturers have opted for a lower cost, near-closed method using transfer molded epoxy and non-hermetic plastic packages. The approximate containment performance provided by this method is between the closed ceramic method and the non-hermetic plastic method. These companies use liquid crystal polymer (LCP)-like thermoplastic materials that deform when heated and air dry and brittle when heat is removed.

Thermoplastic materials are very stable, so you can use a low-cost injection model that can withstand temperatures above 300 degrees. They also have good hygroscopicity and can be melted and reused for recycling.

The use of thermoplastic materials is not new. Ken Gilleo, president of ET-Trends, said that thermoplastic materials have long-term and excellent records in the biomedical field, such as stents and medical implants made of resistant polymers. However, they are almost ignored in MEMS. For MEMS, the advantages and natural suitability of thermoplastic materials are very obvious. He believes that some people are developing suitable thermoplastic materials for MEMS.

The industry is moving to wafer-level packaging, and MEMS devices will remain in wafer format when the package is complete. Many MEMS experts believe that this emerging technology is an ideal solution that not only streamlines the process of integrating MEMS chips with other chips, but also reduces overall costs.

There have been successful examples. For example, Tessera's image detection chip uses the company's Shellcase technology (see "Razor-Thin Package Sharpens Image-Sensing ApplicaTIons"). Benefiting from wafer-level packaging like pressure sensors, accelerometers and other MEMS chips is only a matter of time.

The Tessera/Shellcase example represents a trend to stack chips into thinner overall package structures. But true three-dimensional integration is another challenge that requires interconnect methods to reduce the average length of interconnects in order to overcome the performance limitations of thinner and thinner chips.

Tezzaron Semiconductor's vertical copper interconnect technology, SuperVia, is widely used in the creation of MEMS bonding/correction devices and unique substrates. According to the company, the copper-to-copper bond of the solution not only meets and exceeds the minimum strength requirements of the interconnect, but even exceeds the strength of a typical copper-to-silica (SiO2) interface.

Some successful commercial cases

Many MEMS chip manufacturers have successfully used traditional IC processing to produce MEMS chips with signal conditioning circuits. However, many of these processes are self-developed or licensed from other established companies.

Analog Devices (ADI) pioneered the development of single-chip MEMS accelerometers using surface micromachining technology more than a decade ago. Until then, all other MEMS devices were produced using bulk micromachining techniques. ADI uses a biCMOS process in which the MEMS structure and signal processing circuitry are placed next to each other.

First, selective etching is applied to standard IC lithography processes. A layer of sacrificial oxide is then deposited on the polysilicon layer. The resulting three-dimensional MEMS structure is suspended on the substrate. The biCMOS process is widely used in signal processing circuits (Figure 2).

Seamless interconnect integration technology for MEMS ICs and traditional ICs

AkusTIca's monolithic CMOS MEMS microphone chip contains a metallization layer that is led out and connected to a separately fabricated CMOS signal processing circuit. The final step in the manufacturing process is to remove the sacrificial oxide layer (Figure 3).

Seamless interconnect integration technology for MEMS ICs and traditional ICs

Seamless interconnect integration technology for MEMS ICs and traditional ICs

SiTime and Bosch Sensortec have also succeeded in commercializing MEMS chips and signal processing circuits. SiTime uses the Bosch licensed MEMS First CMOS process. The MEMS sequential circuit with temperature compensation circuitry is then integrated into an industry standard package (Figure 4).

Seamless interconnect integration technology for MEMS ICs and traditional ICs

Discera has also successfully manufactured MEMS sequential circuits. But unlike Bosch and SiTime, Discera places the MEMS structure below after the CMOS signal processing circuit is fabricated. The company also recently introduced a programmable two-chip MEMS sequential circuit. The MEMS resonator is placed in the post-cap structure and the signal conditioning ASIC is interconnected to the resonator structure by wire bonding using a wafer level process.

One of the more successful commercializations of MEMS chips is TI's Digital Optical Processing (DLP) technology. This technology is used by TI's MOEMS Digital Micromirror Device (DMD). The DMD chip has become the basis for home theater, rear projection, and HDTV with a screen diagonal length of 60 inches or more. However, MOEMS's challenges in interconnecting and packaging are more difficult than MEMS chips (see "Interconnecting MOEMS Chips").

Microfluidic challenge

The challenge of interconnecting MEMS chips is large enough, but nothing compared to interconnected microfluidic MEMS, which require very specialized packages and boards. Microfluidic requirements are much higher than MEMS chips and their electronic interconnections, requiring a lead-like approach to handling liquids, gases, and solids. In summary, they usually require fluid connectors and couplings as well as light channels (Figure 5).

Seamless interconnect integration technology for MEMS ICs and traditional ICs

The best way to interconnect these microfluidic chips is to use crimp connections to microfluidic channels shaped with polydimethylsiloxane (PDMS). First, drill a small hole in the PDMS and use a microneedle to access the shaped or buried microchannel. Then insert another pin into the hole to create a direct connection to the microchannel without binding or shaping. These needles can then be easily inserted and removed multiple times because the seal is completely dependent on PDMS compression around each needle.


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